25 - 26 September, 2019

Radisson Blu Bengaluru

Bangalore, India

DVCon India 2019 Call for Panels

DVCon India 2019 Call for Panels

VIEW THE CALL FOR PANELS

SUBMIT NOW 

 

The Design and Verification Conference & Exhibition India (DVCon India) is a highly technical conference in India targeting the application of standardized languages, tools and methodologies for the design and verification of electronic systems, embedded systems and integrated circuits. Hosted by Accellera Systems Initiative, the format of DVCon India is similar to the successful DVCon United States conference held for over 10 years in the Silicon Valley.

The ultimate goal of DVCon India is to boost the interest, usage and development of electronic system designs. DVCon India is looking for panel topics that are current, have a high-level of interest and offer strong content. Highly qualified engineers are expected to attend the sponsored panels during DVCon India 2019. Panel sponsorship allows companies to reach a captive audience and the opportunity to follow up with them during breaks, at the exhibits, and following the event.

You can position your company at the forefront of these discussions by sponsoring a panel. 

Topic Suggestions for Panels:

We invite you to contribute your knowledge and experience within the hardware design and verification, advanced tools, and new methodologies areas, and to participate in the valuable exchange of ideas

Topics that can engage audience through questions and  healthy discussion (pro and con arguments) would add more value to attendees.

Some of the topics of interest to DV Con could be following:

  • Experiences and challenges in design and/or verification of complex IP and System-on-Chip development
  • Dealing with the technical and logistical challenges of multi-site projects
  • Experiences deploying a verification methodology library, especially deployment of UVM
  • Experiences with IP reuse, design automation and integration standards based on IP-XACT, SystemRDL
  • Experiences with Graph based techniques and adoption of Portable Stimulus across IP to SOC to Post Silicon Validation.
  • Experiences with managing large regressions, debugs and huge coverage data for timely design and verification closure and sign off.
  • Experiences applying machine-learning techniques to areas of Design and Verification
  • Experiences adopting functional-safety related standards such as ISO26262, DO-254 etc.
  • Experiences with Emulation, Prototyping and Virtual Platform for Embedded Software Development

Conference attendees are primarily designers of embedded systems, electronic systems, ASICs and FPGAs, Processor and SOCs, as well as those involved in the research, development and application of EDA tools and IP integration solutions. The DVCon India conference attracts a highly skilled user base active in various industries focusing on research and development of automotive, aerospace, consumer, and wired and wireless communication products.

Important Dates

  • June, 2019: Panel proposals due. Submit at DVCon-India.org 
  • 28 June, 2019: Accept/reject notification
  • 15 July, 2019: All panel content due for Conference Program and website: panel title, abstract, panelist names, affiliations, and biographies
  • 25 - 26 September, 2019: DVCon India 2019 conference

Panel Proposal Process

Submit proposals online at https://dvcon-india.org/

 

Panel sessions should not consist of paper presentations, but should have plenty of discussion engaging the audience. Panels are scheduled for 30 minutes either Wednesday or Thursday (25 or 26 September). DVCon will select which day the panel will be presented. Please make sure that moderator and panelists are available during the conference dates. If multiple panel suggestions are submitted with similar topics, the committee may choose to accept one over the others, to merge the proposed panels, or to reject all of them.

Proposals should be 2-3 pages in length and should contain:

• The topic, if possible formulated as a provocative question

• The issues to be discussed, including a short listing of pro and con arguments

• Short biographies of the moderator and prospective panelists

• Any special requirements

 

Questions?

Feel free to contact Callie Koble at callie@mpassociates.com for questions on the submission process.

DVCon India reserves the right to restructure all panel suggestions.


General Chair Sanjay Muchini, Qualcomm, Inc. smuchini@qti.qualcomm.com
Tutorial Chair Lokesh Babu Pundreeka, Cadence Design Systems, Inc. lokeshp@cadence.com
Tutorial Vice Chair Ramdas Mozhikunnath, AMD  mramdas@gmail.com