Event Details

MP Associates, Inc.

FRIDAY September 15, 4:00pm - 5:30pm | Kamal
EVENT TYPE: REGULAR SESSION

SESSION 10
ESL Papers: HW/SW Codesign Track
Chair:
Dineshkumar Selvaraj - Infineon Technologies India Pvt. Ltd
Hardware/software/embedded co-design for early development.

10.1Automated Traffic Simulation Framework for SoC Performance Analysis
 Speaker: Diviya Jain - NXP Semiconductors
 Authors: Diviya Jain - NXP Semiconductors
Tarun Kathuria - NXP Semiconductors
10.2Enabling Left Shift of Performance Validation Using Hardware-Based Simulation Acceleration
 Speaker: Abhiram Ls - Intel Technology India Pvt. Ltd
 Authors: Anoop Hc - Intel Technology India Pvt. Ltd
Abhiram Ls - Intel Technology India Pvt. Ltd
Vijayakrishnan Rousseau - Intel Technology India Pvt. Ltd
Vimpesh Kankariya - Intel Technology India Pvt. Ltd
10.3Case-Study: Generating a Workload Model of the Chrome Browser From Android Execution Traces for Early Analysis of Power and Performance Trade-Offs
 Speaker: Vikrant Kapila - Synopsys, Inc.
 Authors: Vikrant Kapila - Synopsys, Inc.
Holger Keding - Synopsys, Inc.
Tim Kogel - Synopsys, Inc.
Amit Dudeja - Synopsys, Inc.
Amit Tara - Synopsys, Inc.
Nishant Gautam - Synopsys, Inc.