Event Details

MP Associates, Inc.

FRIDAY September 15, 2:00pm - 3:30pm | Royal Ballroom
EVENT TYPE: REGULAR SESSION

SESSION 4
ESL Papers: TLM Track
Chair:
Murali Krishnan - Qualcomm India Pvt. Ltd.
Transaction-level modeling for system-level design (VP, Multi-core, Performance, etc.)

4.1Framework for Exploring Interconnect Level Cache Coherency Using SystemC-TLM
 Speaker: Parvinder Pal Singh - Synopsys India Pvt. Ltd.
 Author: Parvinder Pal Singh - Synopsys India Pvt. Ltd.
4.2Performance Modelling for the Control Backbone
 Speaker: Padam Krishnani - NVIDIA Corp.
 Authors: Raghav Tenneti - NVIDIA Corp.
Padam Krishnani - NVIDIA Corp.
Praveen Wadikar - NVIDIA Corp.
4.3Unified Functional and Performance Simulation Framework
 Speaker: Chaitra K V - Intel Technology India Pvt. Ltd
 Author: Chaitra K V - Intel Technology India Pvt. Ltd