25 - 26 September, 2019

Radisson Blu Bengaluru

Bangalore, India

Event Details

MP Associates, Inc.
WEDNESDAY September 25, 4:45pm - 5:30pm | Arabica
EVENT TYPE: SHORT WORKSHOP
SESSION 4SW
Short Workshop: Applying Design Patterns to Maximize Verification Reuse @Block, Subsystem and System-on-Chip Level

Speakers:
Revati Bothe - Sondrel Ltd
Manish Singhal - Sondrel Ltd
Kiran Kodakandla - Sondrel Ltd
Organizer:
Paul Kaunds - Sondrel Ltd
In this tutorial, we will provide an in-depth analysis of various planning, implementation, debug and coverage closure challenges faced in functional verification at block level, subsystem and system-on-chip level. By taking relevant examples we will demonstrate how these issues can be either avoided or solved by applying Design Patterns mainly Environment, Stimulus and Analysis Patterns. We will also highlight some of the benefits like configuration and re-usability of UVM and C code.

Thank you to our Sponsor