Focus Group Committee
ESL, System and Virtual Modelling
![](https://dvcon-india.org/wp-content/uploads/2024/05/ashish.jpg)
Ashish Mathur
NXP
![](https://dvcon-india.org/wp-content/uploads/2024/05/AravindaTS_photo.jpeg)
Aravinda T
CircuitSutra
![](https://dvcon-india.org/wp-content/uploads/2024/05/Manish_Makkar.png)
Manish Makkar
WDC
Architecture & Design
![](https://dvcon-india.org/wp-content/uploads/2024/05/narasimha-babu.jpg)
Narasimha Babu G V L
Synopsys
![](https://dvcon-india.org/wp-content/uploads/2024/06/Sitaram-Banda.jpg)
Sitaram Banda
Renesas
![](https://dvcon-india.org/wp-content/uploads/2024/05/prateek_sikka.png)
Prateek Sikka
ST
RISC-V EcoSystem
![](https://dvcon-india.org/wp-content/uploads/2024/06/Subhra-Kanti-Das.jpg)
Subhra Das
Thales
Analog and Mixed Signal
![](https://dvcon-india.org/wp-content/uploads/2024/06/Sushma-S.jpg)
Sushma S
Global Foundries
![](https://dvcon-india.org/wp-content/uploads/2024/05/Geetha_photo.jpg)
Geeta K
Synopsys
![](https://dvcon-india.org/wp-content/uploads/2024/06/Anil-Deshpande.jpg)
Anil Deshpande
Samsung
Post Silicon Validation
![](https://dvcon-india.org/wp-content/uploads/2024/06/Seru.png)
Seru Srinivas
Marvell
![](https://dvcon-india.org/wp-content/uploads/2024/05/Girish-Baliga.png)
Girish Baliga
Keysight
![](https://dvcon-india.org/wp-content/uploads/2024/05/ProfilePic-Anoop.jpeg)
Anoop Oruvingal
Mirafra
COUNTDOWN
Days Until Conference
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