Call for Papers
The Design & Verification Conference & Exhibition is the premier conference on the application of languages, tools, methodologies and standards for the design and verification of electronic systems and integrated circuits. The focus of this highly technical conference is on the practical aspects of these technologies and their use in leading-edge projects to encourage attendees to adopt similar techniques to improve their own design and verification flows.
In addition to the specific topic areas suggested below, submissions may incorporate:
- Usage of Electronic Design Automation (EDA) tools such as Simulation, Emulation, Formal verification, Virtual prototyping and/or FPGA prototyping
- FPGA-based designs
- Usage of specialized design and verification languages such as System Verilog, SystemC assertions in SVA or PSL
- General purpose and scripting languages such as C, C++, Perl, Python, Tcl usage
- Accellera Portable Stimulus Standard applications
- Applications of design patterns or other innovative language techniques
- AMS languages user case scenario
- Internet of Things applications
This call for abstracts solicits for papers and corresponding presentations that are highly technical and reflect real-life experiences and emerging trends in various domains. Submissions are encouraged in (but not restricted to) the following areas:
TOPIC AREAS
NEW DESIGN IDEAS, DISRUPTIVE TRENDS IN DESIGN VERIFICATION
- AI/ML Design implementation
- Coverage Metrics and Big data analysis
- New Algorithms in HW/SW co-design and co-verification
VERIFICATION AND VALIDATION
- Advanced methodologies and testbenches
- Verification processes, Regressions and Resource management
- Debug and analysis of complex designs
- Multi-language design and verification
DESIGN AND VERIFICATION REUSE AND AUTOMATION
- Bridging Verification and Validation across multiple engines
- SoC and IP Integration Methods and Tools
- Applications of the Accellera Portable Stimulus Standard
- Configuration management of IP and abstraction levels
- Automation in Verification Process Optimization
FUNCTIONAL SAFETY AND SECURITY
- Methods and flows for functional safety standard compliance (e.g., ISO 26262, DO-254)
- Safety and security in Design, Verification and Validation
- Requirements-Driven Verification Methodologies
- Design approaches on IP Protection and Security
- New methods and tools supporting functional safety and security
MIXED-SIGNAL & LOW-POWER DESIGN & VERIFICATION
- Latest Low-power Design Implementation Techniques
- AMS modeling for concept and System-Level Design
- Application of mixed-signal extensions in verification (e.g., UVM-MS)
- Real-number Modeling Approaches
- Self-checking testbenches in Analog & Mixed Signal Verification
STATIC & FORMAL VERIFICATION
- Clock/Reset Domain Crossing Design and Verification
- Formal Verification techniques and methodology
- Applications of Static and Formal techniques
- Timing Constraints Verification and Timing Analysis
ESL/VIRTUAL PROTOTYPING & SOFTWARE SYSTEM DESIGN
- High-level synthesis from ESL languages
- Bridging Virtual prototyping, Simulation, Emulation and FPGA prototyping
- Usage of higher level of abstraction, System-C & Performance modelling etc.
- Transaction-level modelling (e.g., System-C TLM)
- Software development and verification
PAPER SUBMISSION PROCESS
Note: New Submission Guidelines for DVCon India 2023.
Template available in Resources.
An initial submission called extended abstract is required before the full paper. The extended abstract should provide enough details so that the Technical Program Committee can evaluate the potential quality of your completed paper and the interest of the DVCon attendees in your presentation. An extended abstract is expected to include the following details. The submission should be between a minimum of 600 words and a maximum of 1200 words (approximately 2 pages, not including diagrams, figures or tables).
The extended abstract submission should include:
- Title: The paper title.
- Contact information: Name, affiliation, phone number, email & mailing address for
all authors. - Short Abstract: Outline that clearly states the context and motivation of your
contribution, approx. 100 words. - Related Work: Identify other work on which this submission will be built, and the
novelty of the paper. - Application: Clearly describe the technical contribution, reflect real life experiences,
and its industrial application. - (Preliminary) results: Summarize the results. State how these differ from previous
work or state-of-the-art on the same subject. - Conclusions: Summarize major conclusions and findings presented in the paper.
Accepted authors will be invited and agree to do the following:
- Submit the final version of the paper (max. 8 pages) after incorporating feedback from the TPC
- One Author must Register for the conference
- Submit a copyright form
- All accepted authors agree to present an oral or poster presentation at the conference (13th – 14th Sep 2023).
Please note: Consistent with the requirements for other DVCon India presentations, your presentation may contain your company logo only on the title slide and should use the provided templates.
Please do your initial submission via the EasyChair – Submit Here by April 21, 2023.
The website will open on Feb 20th, 2023.
IMPORTANT DEADLINES
February 20, 2023: Website Open for submission – EasyChair – Submit Here
April 21, 2023: Deadline for Extended abstract submission
May 26, 2023: Extended abstract Accept/reject notification sent to all Authors
June 23, 2023: Deadline for final paper submission
July 21, 2023: Final paper Accept/Reject Notification sent to all Authors
August 11, 2023: Speaker confirmation, Presentation, Copy right forms due
September 13 – 14, 2023: Conference.
CONFERENCE SCHEDULE
September 13, 2023 — Tutorials and Panels
September 14, 2023 — Tutorials, Technical Papers and Poster Session
DVCon India honors the Best Paper/Presentation and Best Poster submissions. The awards will be selected by the attendees at DVCon India based on the quality of both the paper and the presentation.
More information on DVCon India can be found on www.dvcon-india.org
Technical Program Chair
Karthikeyan Subramanian
Google
karthikeyansk@google.com
Technical Program Vice Chair
Girish Marudwar
Synopsys
girishm@synopsys.com