Thanks For a Great 2021 Conference!
Special thanks to all our attendees, speakers, exhibitors, sponsors, and everyone who made DVCon India 2021 a success!
General Category
Best Paper
Never too late with formal: Stepwise guide for applying formal verification in post-silicon phase to avoid re-spins
Anshul Jain, Aarti Gupta, Achutha Kirankumar V M, Bindumadhava Ss, Shivakumar S Kolar and Siva Gadey NV
Intel
2nd Best Paper
Transform your SoCFPGA into an Emulator
Manjari Gupta, Sahil Kadyan and Puneet Goel
NIT, Kurukshetra & CoVerify
ESL/SystemC/Virtual Prototyping
Best Paper
Robust UVM framework for detection of hardware security vulnerabilities in security sub systems and Cryptography IPs
Niharika Sachdeva, Arjun Suresh Kumar, Ravi Teja Gopagiri, Anil Deshpande and Somasunder Kattepura Sreenath
Samsung
2nd Best Paper
Development and Deployment of Vendor Neutral SystemC SoC Functional Virtual Prototype
Rajesh Jain, Navaneet Kumar and Gaurav Sharma
NXP
Best Poster
Best Poster Award
Methodology for Verification Regression Throughput Optimization using Machine Learning
Arun K.R, Preetham Lakshmikanthan, Ashwani Aggarwal and Sundararajan Ananthakrishnan
Samsung & Cadence
2nd Best Poster Award
Enhancing Productivity in Formal Testbench Generation for AHB based IP’s
Shubham Goel, Senthilnath Subbarayan and Sandeep Kumar
Qualcomm
Notable Mentions
Level Four Formal Verification with End-to-End Checkers and Abstractions
Ping Yeung
Oski Technologies
A Methodology for Evaluating SI Artefacts in DDR4-3DS PHY using Channel Modelling
Anil Deshpande and Shivani Maurya
Samsung
Generic Solution for NoC Design Exploration
Tushar Garg and Ranjan Mahajan
Synopsys
AUGUST 7, 2022
Early Bird Registrations ends
SEPTEMBER 5, 2022
DVCon India Begins
On behalf of the DVCon India 2022 steering committee, it is my pleasure to welcome you all to the 7th edition of the Design and Verification Conference in India planned from 5-6th September 2022 as a live conference. We are bringing DVCon India 2022 as a live, in person conference which would make it the first live event in the VLSI ecosystem in India. The conference would be following the traditional Indian version of the conference of two-day conference with in-depth technical content spreading across both the days. We thank you all and the entire ecosystem for the understanding and cooperation throughout this journey.
The IC industry continues to grow thanks to the Systems, Automotive and Technology unicorns venturing to design their own chips and well-established IC companies and start-ups bringing in new innovations and chip architectures. While there are a lot of new designs and architectures, we continue to evolve in…
Unleashing AI/ML for Faster Verification Closure
Design verification is one of the most expensive and tedious activities undertaken in electronic system development. Advances in machine learning (ML) algorithms, software and practices in the last few years have given verification engineers a powerful suite of tools to attack this problem. Verification tool builders have leveraged these ML advances to accelerate coverage closure, generate better simulation distributions, and improve core verification algorithms. We will explore how exploiting supervised, unsupervised and reinforcement learning have enabled order of magnitude gains in closure convergence and verification cycle reduction.
Speaker: Manish Pandey
Title: VP, Engineering
Heterogeneous Integration in the AI Era
Subi Kengeri joined Applied in March 2020 to start a new initiative, AI Systems Solutions. His team is chartered with the goal of architecting differentiated AI Systems leveraging Applied’s fundamental innovations.
Prior to joining Applied, Subi was the CTO and vice president of world-wide client solutions at Globalfoundries, responsible for enabling differentiated SoC and systems solutions. Subi joined Globalfoundries in 2009 as the vice president of global design solutions responsible for world-wide design engineering and semiconductor eco-system development. He was responsible for determining technology feasibility, competitiveness, and manufacturability of technology platform through cross- functional collaboration of customers, R&D and eco-system. In the role of vice president of CMOS Platforms Business Unit, Subi was responsible for business results.
Subi started his SoC design engineering career at Texas Instruments in 1991 and prior to joining Globalfoundries, he was the senior director of design-technology platform and head of North America Design center, at TSMC. Subi has been granted 47 U.S. design engineering patents and has given over 100 invited talks and press interviews.
Speaker: Subramani (Subi) Kengeri
Title: Vice President, AI Systems Solutions